EQUALISATION CIRCUIT, PACKAGING APPARATUS, AND DATA TRANSMISSION APPARATUS
An equalization circuit is provided, including a receiver impedance network (Zt) disposed inside a receiver chip (RX), and a passive equalizer (100) disposed outside the receiver chip (RX). The receiver impedance network (Zt) is connected to the passive equalizer (100) by a first connector (201) and...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | An equalization circuit is provided, including a receiver impedance network (Zt) disposed inside a receiver chip (RX), and a passive equalizer (100) disposed outside the receiver chip (RX). The receiver impedance network (Zt) is connected to the passive equalizer (100) by a first connector (201) and a second connector (202), and is connected to a first trace (203) and a second trace (204) of a differential trace by the first connector (201) and the second connector (202) respectively. The differential trace is configured to connect the receiver chip (RX) and a transmitter chip (TX). An package apparatus and a data transmission apparatus are provided. The receiver impedance network (Zt) and the passive equalizer (100) are connected by the first connector (201) and the second connector (202), so that the receiver impedance network (Zt) and the passive equalizer (100) work cooperatively, and a resistance value of the receiver impedance network (Zt) is adjusted to implement an adjustable receiver bandwidth gain, thereby increasing a working frequency. The passive equalizer (100) is disposed outside the receiver chip (RX) and is connected to the first connector (201) and the second connector (202), and therefore does not occupy additional fan-out space or an additional chip area. |
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