METHOD OF ONO INTEGRATION INTO A LOGIC CMOS PROCESS

Disclosed is a method comprising: forming above a surface on a substrate a stack of gate layers including at least two dielectric layers separated by at least one gate layer; forming a nonvolatile memory device in a first region of the stack of gate layers comprising: forming a first opening extendi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	RAMKUMAR, Krishnaswamy, JIN, Bo, JENNE, Fredrick
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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