METHOD AND DEVICE FOR DETECTING THE CAUSE OF AN ERROR IN AN ELECTRICAL CIRCUIT

Provided is a method and device for determining the cause of a fault in an electrical circuit by a graph-based circuit diagram simulation model of the electrical circuit. A fault is simulated in the electrical circuit and resulting connected components, and respective potential values and/or phase values of the graph vertices of the resulting connected components, are determined by reference to the modified graph-based circuit diagram simulation model, and, on the basis of the potential values and/or phase values of the graph vertices determined, the switching behavior of the electrical circuit is represented by the further addition and/or removal of at least one further graph edge. The resulting potential and/or phase values for specified graph vertices are outputted in the form of simulated output signals. The simulated output signals are compared with reference output signals for the electrical circuit, and the cause of the fault is outputted.