SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

The present disclosure provides apparatus comprising a silicon interposer, a communication fabric, an accelerator die comprising a plurality of computing elements to simultaneously perform operations on a plurality of matrix data elements. The apparatus comprising a plurality of dot-product engines, the plurality of dot-product engines to compute a plurality of dot products on the matrix data elements to generate a plurality of result matrix data elements, a buffer or cache to store a plurality of matrix data elements a memory controller coupled to the communication fabric and a stacked DRAM that stacks a plurality of DRAM dies vertically on the silicon interposer substrate coupled to the accelerator die.