PROTOCOL LEVEL CONTROL FOR SYSTEM ON A CHIP (SOC) AGENT RESET AND POWER MANAGEMENT

A system for consistently implementing reset and power management of IP agents on a System on a Chip (SoC). When IP agents undergo a reset, an individual negotiation takes placed between an interconnect and each IP agent over a link. Each IP agent can emerge from reset at its own time schedule, inde...

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Bibliographische Detailangaben
Hauptverfasser: PEARCE, Mark, JAIN, Amit, DESAI, Shailendra, PATEL, Jaymin, BHATT, Rutul
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:A system for consistently implementing reset and power management of IP agents on a System on a Chip (SoC). When IP agents undergo a reset, an individual negotiation takes placed between an interconnect and each IP agent over a link. Each IP agent can emerge from reset at its own time schedule, independently of the timing of the other IP agents. The interconnect may be configured as a proxy for any IP agent that is inoperable, including prior to reset, when in a power-down mode, or malfunctioning.