ARRANGEMENT FOR A SEMICONDUCTOR-BASED PRESSURE SENSOR CHIP, AND PRESSURE SENSOR CHIP

Provided is an arrangement for a semiconductor-based pressure sensor chip including: piezoresistive elements which are formed having an electrically doped channel in a layer arrangement in the region of a pressure membrane of a semiconductor substrate; an electrically conductive cover layer which is formed in the layer arrangement and is electrically insulated from the piezoresistive elements by an insulating layer; a bridge circuit of transistors, each of which are formed having one of the piezoresistive elements, wherein gate electrodes of the transistors are arranged in electrically doped layer regions in the electrically conductive cover layer, said layer regions being formed separately from one another; and a signal feedback, using which an output signal applied to the output of the bridge circuit is fed back in a signal-amplifying manner to one or more of the gate electrodes. Also provided is a pressure sensor chip.