PSEUDO-RANDOM LOGICAL TO PHYSICAL CORE ASSIGNMENT AT BOOT FOR AGE AVERAGING

A computing device includes a processor having a plurality of cores, a core translation component, and a core assignment component. The core translation component provides a set of registers, one register for each core of the multiple processor cores. The core assignment component includes component...

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Bibliographische Detailangaben
Hauptverfasser: MEHRA, Amitabh, BERNUCHO, Krishna Sai
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:A computing device includes a processor having a plurality of cores, a core translation component, and a core assignment component. The core translation component provides a set of registers, one register for each core of the multiple processor cores. The core assignment component includes components to provide a core index to each of the registers of the core translation component according to a core assignment scheme during processor initialization. Process instructions from an operating system are transferred to a respective core based on the core indices.