CACHE ADDRESS MAPPING METHOD AND RELATED DEVICE

This application discloses a cache cache address mapping method and a related device. The method includes: obtaining a binary file, where the binary file includes a first hot section; obtaining alignment information of a second hot section, where the second hot section is a hot section that has been loaded into the cache, and the alignment information includes a set index of a last cache set occupied by the second hot section after the second hot section is loaded into the cache; and performing an offset operation on the first hot section based on the alignment information, so that the first hot section is mapped to cache sets with consecutive set indexes in the cache, and the cache sets with consecutive set indexes are adjacent to the last cache set. According to embodiments of the present invention, a problem of a conflict miss of a cache in an N-way set associative structure can be resolved without increasing physical hardware overheads, thereby improving a cache hit rate.