MEMORY ARRAYS

A memory array comprising a plurality of memory cells. Each of the memory cells comprises a transistor and a capacitor structure and being disposed within one memory cell tier comprised by a plurality memory cell tiers. The plurality of memory cell tiers are stacked in a vertical direction. A capaci...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	TANG, Sanh, D, ROBERTS, Martin, C, FISHBURN, Fred, D
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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