CONTROL DEVICE FOR CONTROLLING A POWER SEMICONDUCTOR DEVICE
A control device (10) for controlling a power semiconductor device (14) comprises a primary side control unit (20) for receiving a control signal (16) from a superordinated controller (12) and for generating a binary primary side switching signal (s1,p) for the power semiconductor device (14); a sec...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng ; fre ; ger |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A control device (10) for controlling a power semiconductor device (14) comprises a primary side control unit (20) for receiving a control signal (16) from a superordinated controller (12) and for generating a binary primary side switching signal (s1,p) for the power semiconductor device (14); a secondary side control unit (22) for generating a gate signal (18) for the power semiconductor device (14); and a transformer (24) for transferring electrical energy from the primary side control unit (20) to the secondary side control unit (22) and for transferring the primary side switching signal (s1,p) from the primary side control unit (20) to the secondary side control unit (22). The primary side control unit (20) comprises a voltage modulation unit (60) for modulating an input voltage (vp) of the transformer (24), such that the primary side switching signal (s1,p) is encoded into the input voltage (vp);wherein the input voltage (vp) is a signal sequence comprising rising edges (78) encoding a first value of the primary side switching signal (s1,p) and falling edges (80) encoding a second value of the primary side switching signal (s1,p). The secondary side control unit (22) comprises a power supply unit (68) for generating electrical power from an output voltage (vs) of the transformer (24) for supplying the secondary side control unit (22); wherein the secondary side control unit (22) comprises a voltage decoder unit (66) for extracting a secondary side switching signal (s1,s) from the output voltage (vs) by detecting the rising edges (78) and the falling edges (80) in the output voltage (vs) and for generating the gate signal (18) from the secondary side switching signal (s1,s). |
---|