INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION
An integrated circuit with transmission line error detection comprises a substrate (202), a package (218) enclosing the substrate, a lead (212) extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit (224...
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creator | Rigoni, Nicolas Bernier, Brian Cesaretti, Juan Manuel |
description | An integrated circuit with transmission line error detection comprises a substrate (202), a package (218) enclosing the substrate, a lead (212) extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit (224) and an output circuit (204). A first wire (217) is coupled between the output circuit and the lead and a second wire (228) is coupled between the lead and the input circuit so that the input circuit receives a signal generated by the output circuit after the signal has been transmitted across the first and second wires. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3594704B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3594704B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3594704B13</originalsourceid><addsrcrecordid>eNrjZDDx9AtxdQ9yDHF1UXD2DHIO9QxRCPcM8VBw9vfzc3UO8QzzDIlUcA0K8g9ScHENAYn4-_EwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUknjXAGNTSxNzAxMnQ2MilAAAo3cnYw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION</title><source>esp@cenet</source><creator>Rigoni, Nicolas ; Bernier, Brian ; Cesaretti, Juan Manuel</creator><creatorcontrib>Rigoni, Nicolas ; Bernier, Brian ; Cesaretti, Juan Manuel</creatorcontrib><description>An integrated circuit with transmission line error detection comprises a substrate (202), a package (218) enclosing the substrate, a lead (212) extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit (224) and an output circuit (204). A first wire (217) is coupled between the output circuit and the lead and a second wire (228) is coupled between the lead and the input circuit so that the input circuit receives a signal generated by the output circuit after the signal has been transmitted across the first and second wires.</description><language>eng ; fre ; ger</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230510&DB=EPODOC&CC=EP&NR=3594704B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230510&DB=EPODOC&CC=EP&NR=3594704B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Rigoni, Nicolas</creatorcontrib><creatorcontrib>Bernier, Brian</creatorcontrib><creatorcontrib>Cesaretti, Juan Manuel</creatorcontrib><title>INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION</title><description>An integrated circuit with transmission line error detection comprises a substrate (202), a package (218) enclosing the substrate, a lead (212) extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit (224) and an output circuit (204). A first wire (217) is coupled between the output circuit and the lead and a second wire (228) is coupled between the lead and the input circuit so that the input circuit receives a signal generated by the output circuit after the signal has been transmitted across the first and second wires.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDx9AtxdQ9yDHF1UXD2DHIO9QxRCPcM8VBw9vfzc3UO8QzzDIlUcA0K8g9ScHENAYn4-_EwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUknjXAGNTSxNzAxMnQ2MilAAAo3cnYw</recordid><startdate>20230510</startdate><enddate>20230510</enddate><creator>Rigoni, Nicolas</creator><creator>Bernier, Brian</creator><creator>Cesaretti, Juan Manuel</creator><scope>EVB</scope></search><sort><creationdate>20230510</creationdate><title>INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION</title><author>Rigoni, Nicolas ; Bernier, Brian ; Cesaretti, Juan Manuel</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3594704B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>Rigoni, Nicolas</creatorcontrib><creatorcontrib>Bernier, Brian</creatorcontrib><creatorcontrib>Cesaretti, Juan Manuel</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rigoni, Nicolas</au><au>Bernier, Brian</au><au>Cesaretti, Juan Manuel</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION</title><date>2023-05-10</date><risdate>2023</risdate><abstract>An integrated circuit with transmission line error detection comprises a substrate (202), a package (218) enclosing the substrate, a lead (212) extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit (224) and an output circuit (204). A first wire (217) is coupled between the output circuit and the lead and a second wire (228) is coupled between the lead and the input circuit so that the input circuit receives a signal generated by the output circuit after the signal has been transmitted across the first and second wires.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
title | INTEGRATED CIRCUIT WITH CONNECTIVITY ERROR DETECTION |
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