DETECTING STALE MEMORY ADDRESSES FOR A NETWORK DEVICE FLOW CACHE

DETECTING STALE MEMORY ADDRESSES FOR A NETWORK DEVICE FLOW CACHE

An example network device includes a flow cache configured to store a flow cache entry that indicates a memory address referenced by one or more actions of the flow cache entry and a first learn index for the memory address, a memory address map configured to store a second learn index for the memor...

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Bibliographische Detailangaben
Hauptverfasser: KANANDA, Swamy Sadashivaiah Renu, SINGH, Manmeet, PATRICK, Timothy L
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:An example network device includes a flow cache configured to store a flow cache entry that indicates a memory address referenced by one or more actions of the flow cache entry and a first learn index for the memory address, a memory address map configured to store a second learn index for the memory address, and one or more processors implemented in circuity. The network device is configured to receive a packet for the flow and obtain, from the flow cache entry for the flow, the memory address referenced by the one or more actions and the first learn index. The network device is further configured to determine the first learn index matches the second learn index and forward, in response to the determining, the packet using the one or more actions of the flow cache entry.