METHOD OF FORMING A CONDUCTIVE TRENCH OR VIA

METHOD OF FORMING A CONDUCTIVE TRENCH OR VIA

The present disclosure concerns a method of forming a trench or via in a silicon layer (304), the method comprising: applying alternating etching and polymerization steps to a region of the silicon layer (304) to form the trench or via, the region being delimited by a mask layer; removing the mask l...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BARNOLA, Sébastien, MAGIS, Thomas, GAUCHER, François, POLLET, Olivier, CHAUVET, Nicolas
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:The present disclosure concerns a method of forming a trench or via in a silicon layer (304), the method comprising: applying alternating etching and polymerization steps to a region of the silicon layer (304) to form the trench or via, the region being delimited by a mask layer; removing the mask layer; and performing plasma etching to enlarge the width of an opening region (316) of the trench or via.