EMBEDDED CHIP PACKAGES AND METHODS FOR MANUFACTURING AN EMBEDDED CHIP PACKAGE

EMBEDDED CHIP PACKAGES AND METHODS FOR MANUFACTURING AN EMBEDDED CHIP PACKAGE

A method (200) for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate (210); placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the el...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HARTNER, Walter, BEER, Gottfried
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A method (200) for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate (210); placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip (230); and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad (240).