ACTIVE AND STALL CYCLE BASED DYNAMIC SCALING OF PROCESSOR FREQUENCY AND BUS BANDWIDTH

Techniques are described in which to determine as separate values the active time and the stall time of a processing unit at different operating frequencies of the processing unit and bus bandwidths of a bus that interconnects the processing unit to system memory. The techniques may adjust the operating frequency of the processing unit and/or bus bandwidth based on the determined active times and stall times.