SEMICONDUCTOR ARRANGEMENT WITH CONTROLLABLE SEMICONDUCTOR ELEMENTS

A semiconductor arrangement includes a first supply node to be connected to a first electrical potential, a second supply node to be connected to a second electrical potential and a third supply node to be connected to a third electrical potential. A first semiconductor main-element and a second semiconductor main-element, each having a control electrode and a load path, the load paths connected in series between the first supply node and the second supply node, are connected with each other via a first common node. A third semiconductor main-element and a fourth semiconductor main-element, each having a control electrode and a load path, the load paths connected in series and between the third supply node and the second supply node, are connected with each other via a second common node. The arrangement further includes a fifth semiconductor main-element having a control electrode and a load path operatively connected between the first common node and an output node, and a sixth semiconductor main-element having a control electrode and a load path operatively connected between the second common node and the output node. At least two of the controllable semiconductor main-elements each comprise a plurality of identical controllable semiconductor subcomponents, each subcomponent having a control electrode and a controllable load path, the load paths being operatively connected in parallel between the nodes between which the respective controllable semiconductor main-element is connected. In each one of the at least two of the semiconductor main-elements, the first load electrode of each respective semiconductor subcomponent is electrically connected to the respective node via an individual one of a multiplicity of separate output lines, each of the separate output lines being configured to provide identical voltage and current transfers.