CALIBRATABLE DATA CONVERTER

The disclosure relates to a calibratable data converter, in particular to a calibratable Analog-to-Digital Converter (ADC) (300), comprising: a comparator (103); a first capacitor line (Cp, 110) comprising a plurality of capacitances coupled in parallel to a first input terminal (+) of the comparator (103); a second capacitor line (Cn, 120) comprising a plurality of capacitances coupled in parallel to a second input terminal (-) of the comparator (103); and a controller (104) configured: to drive a first part (111) of the first capacitor line (110) with a first voltage pattern (112) and a corresponding first part (121) of the second capacitor line (120) with a second voltage pattern (122) in order to sample the voltage patterns to the capacitors of the first part (111) of the first capacitor line (110) and the corresponding first part (121) of the second capacitor line (120) respectively, to drive the first part (111) of the first capacitor line (110) with a second voltage pattern (122)and the corresponding first part (121) of the second capacitor line (120) with the first voltage pattern (112) in order to generate a comparator input voltage (Vq) between the input terminals (+,-) of the comparator (103), and to adjust a second part (113) of the first capacitor line (110) and a corresponding second part (123) of the second capacitor line (120) in order to capture a residual voltage, which corresponds to the comparator input voltage (Vq), as calibration value.