EFFICIENT MEMORY AWARE CACHE MANAGEMENT

An indication of a first cache entry to be removed from a cache, the first cache entry corresponding to a first memory address in a memory may be received. A second memory address in the memory based at least in part on the first memory address may be identified. A request to identify a second cache...

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Bibliographische Detailangaben
Hauptverfasser: NORI, Anant V, R, Manikantan, LEMPEL, Ori, POLISHUK, Leon, SHIFER, Eran, VENKATESAN, Ravi K
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:An indication of a first cache entry to be removed from a cache, the first cache entry corresponding to a first memory address in a memory may be received. A second memory address in the memory based at least in part on the first memory address may be identified. A request to identify a second cache entry in the cache corresponding to the second memory address and to determine whether a removal policy is satisfied may be sent. A response to the request, the response comprising an indication of the second cache entry to be removed from the cache based at least in part on the request may be sent. The first cache entry and the second cache entry from the cache may be removed. Data corresponding to the first and second cache entries to the memory with a single page file access may be written.