METHOD FOR GENERATING AN ELECTRONIC CIRCUIT MODELLING SUBSTRATE COUPLING EFFECTS IN AN INTEGRATED CIRCUIT

METHOD FOR GENERATING AN ELECTRONIC CIRCUIT MODELLING SUBSTRATE COUPLING EFFECTS IN AN INTEGRATED CIRCUIT

The present invention relates to design and manufacture of integrated circuits and more particularly to electrical modelling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, the modelling of substrate coupling effects in t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MOURSY, Yasser, ISKANDER, Ramy, ZOU, Hao
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The present invention relates to design and manufacture of integrated circuits and more particularly to electrical modelling of integrated circuits combining high voltage power devices with low voltage control logic blocks, and even more particularly, the modelling of substrate coupling effects in these circuits.