CENTRAL PROCESSING UNIT WITH ENHANCED INSTRUCTION SET

CENTRAL PROCESSING UNIT WITH ENHANCED INSTRUCTION SET

An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master centr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WILKIE, Calum, CATHERWOOD, Michael, SACHS, Jason, REITER, Andreas, MICKEY, David, KRIS, Bryan
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.