POWER TRANSISTOR WITH HARMONIC CONTROL

A system and method for a packaged device (100) with harmonic control are presented. In one embodiment, a device includes a substrate (102) and a transistor die coupled to the substrate. The transistor die includes a plurality of transistor cells (110). Each transistor cell in the plurality of transistor cells includes a control (e.g., gate) terminal (112). The device includes a second die (118) coupled to the substrate. The second die includes a plurality of individual shunt capacitors (128) coupled between the control terminals of the plurality of transistor cells and a ground reference node. The capacitance values of at least two of the shunt capacitors are significantly different.