TESTING CIRCUIT OF A LONG-TIME-CONSTANT CIRCUIT STAGE AND CORRESPONDING TESTING METHOD
A testing circuit (19) for a charge-retention circuit stage (1) for measurement of a time interval provided with: a storage capacitor (2) connected between a first biasing terminal (3a) and a floating node (4); and a discharge element (6) connected between the floating node and a reference terminal...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | A testing circuit (19) for a charge-retention circuit stage (1) for measurement of a time interval provided with: a storage capacitor (2) connected between a first biasing terminal (3a) and a floating node (4); and a discharge element (6) connected between the floating node and a reference terminal (7), for discharge of a charge stored in the storage capacitor by leakage through a corresponding dielectric. The testing circuit envisages: a biasing stage (24) for biasing the floating node at a reading voltage (V L ); a detection stage (30, 32) for detecting the biasing value (V L (t 0 )) of the reading voltage; and an integrator stage (20), having a test capacitor (28) coupled to the floating node, for implementing an operation of integration of the discharge current (i L ) in the discharge element with the reading voltage kept constant at the biasing value, and determining an effective resistance value (R L ') of the discharge element as a function of the integration operation. |
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