DOUBLE SAMPLING STATE RETENTION FLIP-FLOP

DOUBLE SAMPLING STATE RETENTION FLIP-FLOP

Embodiments of a device and method are disclosed. In an embodiment, a flip-flop circuit is disclosed. The flip-flop circuit includes a master latch, a slave latch connected to the master latch, and a dual-function circuit connected between the master latch and the slave latch and configured to perfo...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FABRIE, Sebastien Antonius Josephus, PINEDA DE GYVEZ, Jose de Jesus, ECHEVERRI ESCOBAR, Juan Diego
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:Embodiments of a device and method are disclosed. In an embodiment, a flip-flop circuit is disclosed. The flip-flop circuit includes a master latch, a slave latch connected to the master latch, and a dual-function circuit connected between the master latch and the slave latch and configured to perform state retention and double sampling.