PHASE LOCKED LOOP WITH LOCK DETECTOR

A phase locked loop (100) is disclosed comprising: a phase detector (115), loop filter (120) and a frequency controlled oscillator (130). The phase detector (115) is configured to determine a phase difference (” Õ ) between a reference signal and a feedback signal ( Õ v ). The loop filter (120) is configured to perform a filtering operation on a signal derived from the phase difference (” Õ ) and to provide a control signal (PVT, ACQ, TR). The frequency controlled oscillator (130) is configured to receive the control signal (PVT, ACQ, TR) and provide an output signal with a frequency that varies according to the control signal (PVT, ACQ, TR). The phase locked loop (100) further comprises a lock detector (200), including: a phase lock detector configured to receive a first signal (” Õ ) from the phase locked loop (100), and to derive a phase lock signal (261) from the first signal (” Õ ), the phase lock signal (261) indicating whether the phase locked loop (100) is in phase lock; a frequency lock detector configured to receive a second signal (TR) from the phase locked loop (100), and to derive a frequency lock signal (262) from the second signal (TR), the frequency lock signal (262) indicating whether the phase locked loop (100) is in frequency lock. An unlock detector may be provided, configured to determine whether the first signal (” Õ ) has changed by a predetermined amount during a predetermined period.