DOUBLE-LAYER COMPOUND REGISTER SYSTEM AND METHOD FOR RESISTING ENERGY ANALYSIS ATTACKS

With the double-layer compound register system and method for resisting power analysis, in the first half of the clock cycle, the control unit may enable the work register and the complementary register, the values of which are complementary, to work and enable the output register and the output complementary register, the values of which are complementary, to reset. In the second half of the clock cycle, the control unit may enable the output register and the output complementary register, the values of which are complementary, to work, and enable the work register and the complementary register, the values of which are complementary, to reset. Therefore, HD values and the HW values of the system in the work state may be constant. The system not only may resist the power analysis attacks, but also may reduce the clock cycle for outputting a group of data to one clock cycle. Therefore, the throughput of the whole chip may be enhanced. Components used by the double-layer compound register system in embodiments of the present disclosure may satisfy requirements of the standard circuit component database, and may have good compatibility, such as may be compatible with the chip.