STATIC ADDRESS ALLOCATION BY PASSIVE ELECTRONICS

The present invention relates to a bus node IC (1) comprising at least one static address selection terminal (3). The IC further comprises a detecting circuit (4) for detecting a state of the static address selection terminal (3), and a communication circuit (5) adapted for determining a node addres...

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1. Verfasser: VANDERSTEEGEN, PETER
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:The present invention relates to a bus node IC (1) comprising at least one static address selection terminal (3). The IC further comprises a detecting circuit (4) for detecting a state of the static address selection terminal (3), and a communication circuit (5) adapted for determining a node address identifier taking the detected state into account. The detecting circuit (4) is adapted for detecting the state by determining an electrical property of a passive electronic component when connected to the static address selection terminal (3). The communication circuit (5) is adapted for receiving/transmitting data over the data bus (9) in accordance with a first communication protocol using the node address identifier for identification of the IC, and for receiving/transmitting data over said data bus (9) in accordance with a second communication protocol using a further node address identifier for identification of the IC, wherein the communication circuit (5) is adapted for configuring the further node address identifier by using data received using the first protocol.