FLOATING GATE MEMORY CELLS IN VERTICAL MEMORY
Disclosed is an apparatus comprising:a vertical string of memory cells, wherein each memory cell of the vertical string of memory cells comprises:a control gate (942) between an upper surface of a first tier of dielectric material (940) and a lower surface of a second tier of dielectric material (94...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng ; fre ; ger |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Disclosed is an apparatus comprising:a vertical string of memory cells, wherein each memory cell of the vertical string of memory cells comprises:a control gate (942) between an upper surface of a first tier of dielectric material (940) and a lower surface of a second tier of dielectric material (940);a floating gate (966) between the upper surface of the first tier of dielectric material and the lower surface of the second tier of dielectric material, the floating gate comprising a first portion and a protrusion (969),wherein the first portion contacts the upper surface of the first tier of dielectric material and the lower surface of the second tier of dielectric material,wherein the protrusion extends from the first portion towards the control gate; anda charge blocking structure (948, 950, 956) between the floating gate and the control gate, wherein the charge blocking structure comprises a barrier film (950), wherein a substantially horizontal portion of the barrier film laterally extends to a point such that the substantially horizontal portion is between the protrusion and the first tier of dielectric material but not between the first portion and the first tier of dielectric material. |
---|