A CIRCUIT FOR USE IN SCAN TESTING
An integrated circuit or die comprising: a first input pad configured to receive an input, said first input pad input comprises scan data multiplexed with a clock signal; a scan chain configured to receive said scan data and said clock signal, a circuit provided between said first input pad and said...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | An integrated circuit or die comprising: a first input pad configured to receive an input, said first input pad input comprises scan data multiplexed with a clock signal; a scan chain configured to receive said scan data and said clock signal, a circuit provided between said first input pad and said scan chain configured to provide from said input a first output and a second output, said first output providing said scan data and said second output providing said clock signal. |
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