A bias circuit for a transistor amplifier

A bias circuit for a transistor amplifier (Q1), the bias circuit comprising a low-pass filter block (1), a reference transistor (Q2), a sum node (14), a reference current source (4), and a current difference block (5), wherein the low-pass filter block (1) is configured to sense a DC bias voltage at a control terminal of the transistor amplifier (Q1) and provide the DC bias voltage to a control terminal of the reference transistor (Q2); the reference transistor (Q2) is configured to output a bias current in response to the DC bias voltage and provide the bias current to the sum node (14); the sum node (14) is configured to receive a reference current from the reference current source (4) and combine the reference current with the bias current from the reference transistor (Q2) to provide a difference current; and the current difference block (5) is configured to receive the difference current from the sum node (14) and provide the difference current to the control terminal of the transistor amplifier (Q1).