VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD

The present invention is intended to provide a vacuum suction stage that suppresses damage on a dicing tape during dicing and a method of dicing a semiconductor wafer using the vacuum suction stage. The present invention is further intended to provide a method of annealing a semiconductor wafer usin...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: MATSUMURA TAMIO
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator MATSUMURA TAMIO
description The present invention is intended to provide a vacuum suction stage that suppresses damage on a dicing tape during dicing and a method of dicing a semiconductor wafer using the vacuum suction stage. The present invention is further intended to provide a method of annealing a semiconductor wafer using the vacuum suction stage that suppresses bubble formation in a grinding protection tape. The vacuum suction stage of the present invention includes a placement surface 1a on which a semiconductor wafer 6 is to be placed. A vacuum suction hole 2 is formed in the placement surface 1a only in an area external to a chip region 6a of the semiconductor wafer 6.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2827362A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2827362A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2827362A13</originalsourceid><addsrcrecordid>eNrjZEgMc3QODfVVCA51DvH091MIDnF0d9VRCHb19XT293MBivoHKYQ7urkGKbh4Onv6uSv4uoZ4-LvoKDj6uWBV5ujn5-rog1DJw8CalphTnMoLpbkZFNxcQ5w9dFML8uNTiwsSk1PzUkviXQOMLIzMjc2MHA2NiVACAE-PM0Y</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD</title><source>esp@cenet</source><creator>MATSUMURA TAMIO</creator><creatorcontrib>MATSUMURA TAMIO</creatorcontrib><description>The present invention is intended to provide a vacuum suction stage that suppresses damage on a dicing tape during dicing and a method of dicing a semiconductor wafer using the vacuum suction stage. The present invention is further intended to provide a method of annealing a semiconductor wafer using the vacuum suction stage that suppresses bubble formation in a grinding protection tape. The vacuum suction stage of the present invention includes a placement surface 1a on which a semiconductor wafer 6 is to be placed. A vacuum suction hole 2 is formed in the placement surface 1a only in an area external to a chip region 6a of the semiconductor wafer 6.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150121&amp;DB=EPODOC&amp;CC=EP&amp;NR=2827362A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150121&amp;DB=EPODOC&amp;CC=EP&amp;NR=2827362A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MATSUMURA TAMIO</creatorcontrib><title>VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD</title><description>The present invention is intended to provide a vacuum suction stage that suppresses damage on a dicing tape during dicing and a method of dicing a semiconductor wafer using the vacuum suction stage. The present invention is further intended to provide a method of annealing a semiconductor wafer using the vacuum suction stage that suppresses bubble formation in a grinding protection tape. The vacuum suction stage of the present invention includes a placement surface 1a on which a semiconductor wafer 6 is to be placed. A vacuum suction hole 2 is formed in the placement surface 1a only in an area external to a chip region 6a of the semiconductor wafer 6.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZEgMc3QODfVVCA51DvH091MIDnF0d9VRCHb19XT293MBivoHKYQ7urkGKbh4Onv6uSv4uoZ4-LvoKDj6uWBV5ujn5-rog1DJw8CalphTnMoLpbkZFNxcQ5w9dFML8uNTiwsSk1PzUkviXQOMLIzMjc2MHA2NiVACAE-PM0Y</recordid><startdate>20150121</startdate><enddate>20150121</enddate><creator>MATSUMURA TAMIO</creator><scope>EVB</scope></search><sort><creationdate>20150121</creationdate><title>VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD</title><author>MATSUMURA TAMIO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2827362A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MATSUMURA TAMIO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MATSUMURA TAMIO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD</title><date>2015-01-21</date><risdate>2015</risdate><abstract>The present invention is intended to provide a vacuum suction stage that suppresses damage on a dicing tape during dicing and a method of dicing a semiconductor wafer using the vacuum suction stage. The present invention is further intended to provide a method of annealing a semiconductor wafer using the vacuum suction stage that suppresses bubble formation in a grinding protection tape. The vacuum suction stage of the present invention includes a placement surface 1a on which a semiconductor wafer 6 is to be placed. A vacuum suction hole 2 is formed in the placement surface 1a only in an area external to a chip region 6a of the semiconductor wafer 6.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP2827362A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title VACUUM SUCTION STAGE, SEMICONDUCTOR WAFER DICING METHOD, AND SEMICONDUCTOR WAFER ANNEALING METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T15%3A38%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MATSUMURA%20TAMIO&rft.date=2015-01-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP2827362A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true