Multiple data rate memory with read timing information
A memory (14 or 24) includes a memory array (18 or 26), read circuitry (20 or 28), and a strobe generator (22 or 30). The read circuitry is configured to provide read data from the memory array in response to a read request, wherein the read circuitry provides the read data in accordance with a firs...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | A memory (14 or 24) includes a memory array (18 or 26), read circuitry (20 or 28), and a strobe generator (22 or 30). The read circuitry is configured to provide read data from the memory array in response to a read request, wherein the read circuitry provides the read data in accordance with a first clock. The strobe generator is configured to provide a strobe signal with the read data, wherein the strobe generator provides the strobe signal in accordance with a second clock. The second clock is out of phase with the first clock by a phase in a range of 30 degrees to 150 degrees. |
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