System and method for processing data flows

System and method for processing data flows

A digital signal processor (300), compatible with the Common Public Radio interface (CPRI), permits reading and writing of IQ data of antenna carriers which have two different sampling rates by using just two single sample rate DMA (Direct Memory Access) modules (306,313). The digital signal process...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Shor, Roy, Horn, Avraham, Goren, Ori
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Zusammenfassung:A digital signal processor (300), compatible with the Common Public Radio interface (CPRI), permits reading and writing of IQ data of antenna carriers which have two different sampling rates by using just two single sample rate DMA (Direct Memory Access) modules (306,313). The digital signal processor (300) is capable of processing data of different sampling rates on just one CPRI lane comprising one framer (302). This is achieved by incorporating a divider module (307) and a multiplexer module (314) between the framer (302) and system memory (309, 315).. The processor (300) may also be configured so that single sampling rates can also be accommodated.