SYSTEMS AND METHODS FOR CONTROLLING POWER IN SEMICONDUCTOR CIRCUITS

A power control circuit includes a plurality of transistors coupled between a power supply node (VDD) and a gated power supply node (VDDi), wherein the gate electrode of a first transistor of the plurality of transistors (102, 104, 106) is coupled to receive a power control signal, wherein, in respo...

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Bibliographische Detailangaben
Hauptverfasser: Ilgenstein, Kerry A, Choy, Jon S
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:A power control circuit includes a plurality of transistors coupled between a power supply node (VDD) and a gated power supply node (VDDi), wherein the gate electrode of a first transistor of the plurality of transistors (102, 104, 106) is coupled to receive a power control signal, wherein, in response to assertion of the power control signal, the first transistor is placed into a conductive state; a first voltage comparator (112), wherein, in response to assertion of the power control signal, places a second transistor of the plurality of transistors in a conductive state when a voltage on the gated voltage supply node reaches a first reference voltage; and a second voltage comparator (114), wherein, in response to assertion of the power control signal, places a third transistor of the plurality of transistors in a conductive state when the voltage on the gated voltage supply node reaches a second reference voltage different from the first reference voltage.