High performance renormalization for binary arithmetic video coding

Various embodiments for high performance renormalisation for video encoding are described. In the described embodiments, renormalisation includes detecting a leading number of '0's in a range value of an input string of symbols. A renormalisation iteration number is generated based on the...

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1. Verfasser: VAITHIANATHAN, KARTHIK
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:Various embodiments for high performance renormalisation for video encoding are described. In the described embodiments, renormalisation includes detecting a leading number of '0's in a range value of an input string of symbols. A renormalisation iteration number is generated based on the detected leading number of '0's in the range of value. A new range value is generated by renormalising the original range value based on the generated renormalisation iteration number. A new offset value is generated by renormalising an offset value of the input string of symbols based on the generated renormalisation iteration number. Such arithmetic video encoding can be performed by machine execution of instructions stored in a computer-readable storage medium. Apparatus is provided for arithmetic encoding which includes a detection module for detecting the leading number of '0's in the range value of the input string of symbols, a first shift and register module for generating the new range value, and a second shift and register module for generating the new offset value.