Secure low pin count scan

Secure low pin count scan

A contactless smartcard type integrated circuit needing only two pins for performing a standard ATPG test is disclosed. A scan test may be performed using one pin for the clock and the other pin for the input and input of the scan test data. Additionally, security is enhanced by using an embedded si...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: PUGLIESE-CONTI, PAUL-HENRI
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
HANDLING RECORD CARRIERS
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PRESENTATION OF DATA
RECOGNITION OF DATA
RECORD CARRIERS
TESTING
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:A contactless smartcard type integrated circuit needing only two pins for performing a standard ATPG test is disclosed. A scan test may be performed using one pin for the clock and the other pin for the input and input of the scan test data. Additionally, security is enhanced by using an embedded signature generator to avoid observation of the data shifted out.