INSTRUCTION PROCESSING METHOD OF NETWORK PROCESSOR AND NETWORK PROCESSOR

The present invention provides an instruction processing method of a network processor and a network processor. The method includes: when the network processor executes a pre-added combined function call instruction, adding an address of its next instruction to a stack top of a first stack; judging, according to the combined function call instruction, whether an enable flag of each additional feature is enabled, and if enabled, adding a function entry address corresponding to an additional feature to the stack top of the first stack; and after finishing judging all enable flags, popping a function entry address in the first stack from the stack top of the stack, and executing a function corresponding to a popped function entry address until the address of the next instruction is popped. The network processor includes: a first processing module and a second processing module. In the present invention, only one judgment jump instruction needs to be added to a main line procedure to implement function call of all enabled additional features, which greatly saves an instruction execution cycle, and reduces influence of an additional feature on main line performance.