Method of fabricating a high-voltage transistor

A method for making a high voltage insulated gate field-effect transistor with one or more JFET conduction channels comprises successively implanting a dopant (64) of a first conductivity type in a first epitaxial layer (60) of a second conductivity type so as to form a first plurality of buried lay...

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Bibliographische Detailangaben

1. Verfasser:	DISNEY, DONALD RAY
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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