DEVICE AND METHOD FOR SIMULTANEOUSLY PRECIPITATING A PLURALITY OF SEMICONDUCTOR LAYERS IN A PLURALITY OF PROCESS CHAMBERS

A method for depositing a semiconductor layer on a multiplicity of substrates. The process chamber height (H), which is defined by the spacing between a process chamber ceiling (8) and a process chamber floor (9) is variable and influences the growth rate of the layer. The layer thickness is measure...

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Bibliographische Detailangaben
Hauptverfasser:	KÄPPELER, JOHANNES, BOYD, ADAM
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
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Beschreibung
Zusammenfassung:	A method for depositing a semiconductor layer on a multiplicity of substrates. The process chamber height (H), which is defined by the spacing between a process chamber ceiling (8) and a process chamber floor (9) is variable and influences the growth rate of the layer. The layer thickness is measured continuously or at in short intervals on at least one substrate (5) in each process chamber (2) while the layer is growing. The process chamber height (H) is varied by means of a controller (12) and an adjusting member (6), so that layers having the same layer thickness are deposited in the process chambers.