Low consumption flip-flop circuit with data retention and method thereof

The present invention relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop (10) and at least one retention cell (20; 200) connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal (SO), while during low consumption operation of the flip-flop circuit a latch circuit (22; 220) of the retention cell suitable to memorise data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.