Track-and-hold peak detector circuit

A circuit, comprising a track-and-hold circuit and a first logic circuit, the track-and-hold circuit comprising: a capacitor having a threshold node; a charging circuit to charge the capacitor; and a discharging circuit to discharge the capacitor, wherein the track-and-hold circuit is configured to track an input signal and to hold respective capacitor voltages on the threshold node in accordance with positive and negative peaks of the input signal, wherein the track-and-hold circuit has an output node at which an output signal is provided in accordance with the positive and negative peaks of the input signal; and wherein the first logic circuit is configured to provide a first logic circuit output signal at a first logic circuit output node having a transition indicative of no charging of the capacitor by the charging circuit at the same time as no discharging of the capacitor by the discharging circuit, wherein the first logic circuit output signal is configured to control the track-and-hold circuit.