PLD architecture for flexible placement of IP function blocks

PLD architecture for flexible placement of IP function blocks

In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base si...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LEVENTIS, PAUL, REDDY, SRINIVAS, LEE, ANDY L, LANE, CHRIS, LEWIS, DAVID, JOHNSON, BRIAN D, MCCLINTOCK, CAMERON, CLIFF, RICHARD, BETZ, VAUGHN TIMOTHY
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.