Integrated circuit comprising PIN diodes
A semiconductor substrate (1) is provided with an "I" region (2) having intrinsic conductivity or a low doping of a first type of conductivity, which can be a low-doped epitaxial layer on a surface of the substrate. A PSUB well (3) of the first type of conductivity and a PIN region (4, 5)...
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creator | VESCOLI, VERENA TEVA, JORDI JONAK-AUER, INGRID |
description | A semiconductor substrate (1) is provided with an "I" region (2) having intrinsic conductivity or a low doping of a first type of conductivity, which can be a low-doped epitaxial layer on a surface of the substrate. A PSUB well (3) of the first type of conductivity and a PIN region (4, 5) of the opposite second type of conductivity are implanted in the "I" region (2). Further components (7, 8, 9) of the integrated circuit are arranged in the PSUB well (3). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP2216815B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP2216815B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP2216815B13</originalsourceid><addsrcrecordid>eNrjZNDwzCtJTS9KLElNUUjOLEouzSxRSM7PLSjKLM7MS1cI8PRTSMnMT0kt5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BRkaGZhaGpk6GxkQoAQB5Yye_</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated circuit comprising PIN diodes</title><source>esp@cenet</source><creator>VESCOLI, VERENA ; TEVA, JORDI ; JONAK-AUER, INGRID</creator><creatorcontrib>VESCOLI, VERENA ; TEVA, JORDI ; JONAK-AUER, INGRID</creatorcontrib><description>A semiconductor substrate (1) is provided with an "I" region (2) having intrinsic conductivity or a low doping of a first type of conductivity, which can be a low-doped epitaxial layer on a surface of the substrate. A PSUB well (3) of the first type of conductivity and a PIN region (4, 5) of the opposite second type of conductivity are implanted in the "I" region (2). Further components (7, 8, 9) of the integrated circuit are arranged in the PSUB well (3).</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140402&DB=EPODOC&CC=EP&NR=2216815B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140402&DB=EPODOC&CC=EP&NR=2216815B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>VESCOLI, VERENA</creatorcontrib><creatorcontrib>TEVA, JORDI</creatorcontrib><creatorcontrib>JONAK-AUER, INGRID</creatorcontrib><title>Integrated circuit comprising PIN diodes</title><description>A semiconductor substrate (1) is provided with an "I" region (2) having intrinsic conductivity or a low doping of a first type of conductivity, which can be a low-doped epitaxial layer on a surface of the substrate. A PSUB well (3) of the first type of conductivity and a PIN region (4, 5) of the opposite second type of conductivity are implanted in the "I" region (2). Further components (7, 8, 9) of the integrated circuit are arranged in the PSUB well (3).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNDwzCtJTS9KLElNUUjOLEouzSxRSM7PLSjKLM7MS1cI8PRTSMnMT0kt5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BRkaGZhaGpk6GxkQoAQB5Yye_</recordid><startdate>20140402</startdate><enddate>20140402</enddate><creator>VESCOLI, VERENA</creator><creator>TEVA, JORDI</creator><creator>JONAK-AUER, INGRID</creator><scope>EVB</scope></search><sort><creationdate>20140402</creationdate><title>Integrated circuit comprising PIN diodes</title><author>VESCOLI, VERENA ; TEVA, JORDI ; JONAK-AUER, INGRID</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP2216815B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>VESCOLI, VERENA</creatorcontrib><creatorcontrib>TEVA, JORDI</creatorcontrib><creatorcontrib>JONAK-AUER, INGRID</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>VESCOLI, VERENA</au><au>TEVA, JORDI</au><au>JONAK-AUER, INGRID</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit comprising PIN diodes</title><date>2014-04-02</date><risdate>2014</risdate><abstract>A semiconductor substrate (1) is provided with an "I" region (2) having intrinsic conductivity or a low doping of a first type of conductivity, which can be a low-doped epitaxial layer on a surface of the substrate. A PSUB well (3) of the first type of conductivity and a PIN region (4, 5) of the opposite second type of conductivity are implanted in the "I" region (2). Further components (7, 8, 9) of the integrated circuit are arranged in the PSUB well (3).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Integrated circuit comprising PIN diodes |
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