HIGH-SPEED RECEIVER ARCHITECTURE

A receiver (e.g., for a 10G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	CARRER, HUGO, SANTIAGO, AGAZZI, OSCAR, ERNESTO, LUNA, GERMAN CESAR, AUGUSTO, CRIVELLI, DIEGO, ERNESTO, HUEDA, MARIO, RAFAEL, GRACE, CARL
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!