Administration module, producer and consumer processor, arrangement thereof and method for inter-processor communication via a shared memory

Administration module, producer and consumer processor, arrangement thereof and method for inter-processor communication via a shared memory

Administration module (AM), producer (PP) and consumer processor (CP), arrangement thereof and method for inter-processor communication via a shared memory (SM), wherein said module (AM) comprises: means for storing (10) and administering (11) the states of triple-buffers (B0 ... Bm), each buffer (B...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ROETTGER, KAI, HACIOGLU, HAMIT
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Administration module (AM), producer (PP) and consumer processor (CP), arrangement thereof and method for inter-processor communication via a shared memory (SM), wherein said module (AM) comprises: means for storing (10) and administering (11) the states of triple-buffers (B0 ... Bm), each buffer (B0 ... Bm) having a read- (WSB), a write- (WSB) and an idle-sub-buffer (ISB); means for communicating (20) with at least one producer (PP) and at least one consumer processor (CP), and wherein said administration means (11) is formed to determine a targeted read- (RSB) or write-sub-buffer (WSB) from the triple-buffers (B0 ... Bm) in response to a producer or consumer processor access, respectively.