Printed circuit board
A printed circuit board (100) includes a base insulating layer (1), first to third signal lines (3a,3b,3c), a first cover insulating layer (4) and a conductive layer (6). Wide parts (31,32,33) are formed in the first to third signal lines (3a,3b,3c). The first cover insulating layer (4) is provided...
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| creator | MITSURU, HONJO |
| description | A printed circuit board (100) includes a base insulating layer (1), first to third signal lines (3a,3b,3c), a first cover insulating layer (4) and a conductive layer (6). Wide parts (31,32,33) are formed in the first to third signal lines (3a,3b,3c). The first cover insulating layer (4) is provided on the base insulating layer (1) so as to cover the wide parts (31,32,33). The conductive layer (6) is provided on the first cover insulating layer (4) so as to cover a portion above the wide parts (31,32,33).
A capacitive element is formed of the wide part (31,32,33), the cover insulating layer (4) and the conductive layer (6). Generation of high-frequency noise can be prevented. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP1951009A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP1951009A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP1951009A13</originalsourceid><addsrcrecordid>eNrjZBANKMrMK0lNUUjOLEouzSxRSMpPLErhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgGGlqaGBgaWjobGRCgBADDYIKc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Printed circuit board</title><source>esp@cenet</source><creator>MITSURU, HONJO</creator><creatorcontrib>MITSURU, HONJO</creatorcontrib><description>A printed circuit board (100) includes a base insulating layer (1), first to third signal lines (3a,3b,3c), a first cover insulating layer (4) and a conductive layer (6). Wide parts (31,32,33) are formed in the first to third signal lines (3a,3b,3c). The first cover insulating layer (4) is provided on the base insulating layer (1) so as to cover the wide parts (31,32,33). The conductive layer (6) is provided on the first cover insulating layer (4) so as to cover a portion above the wide parts (31,32,33).
A capacitive element is formed of the wide part (31,32,33), the cover insulating layer (4) and the conductive layer (6). Generation of high-frequency noise can be prevented.</description><language>eng ; fre ; ger</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080730&DB=EPODOC&CC=EP&NR=1951009A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080730&DB=EPODOC&CC=EP&NR=1951009A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MITSURU, HONJO</creatorcontrib><title>Printed circuit board</title><description>A printed circuit board (100) includes a base insulating layer (1), first to third signal lines (3a,3b,3c), a first cover insulating layer (4) and a conductive layer (6). Wide parts (31,32,33) are formed in the first to third signal lines (3a,3b,3c). The first cover insulating layer (4) is provided on the base insulating layer (1) so as to cover the wide parts (31,32,33). The conductive layer (6) is provided on the first cover insulating layer (4) so as to cover a portion above the wide parts (31,32,33).
A capacitive element is formed of the wide part (31,32,33), the cover insulating layer (4) and the conductive layer (6). Generation of high-frequency noise can be prevented.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBANKMrMK0lNUUjOLEouzSxRSMpPLErhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgGGlqaGBgaWjobGRCgBADDYIKc</recordid><startdate>20080730</startdate><enddate>20080730</enddate><creator>MITSURU, HONJO</creator><scope>EVB</scope></search><sort><creationdate>20080730</creationdate><title>Printed circuit board</title><author>MITSURU, HONJO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1951009A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2008</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>MITSURU, HONJO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MITSURU, HONJO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Printed circuit board</title><date>2008-07-30</date><risdate>2008</risdate><abstract>A printed circuit board (100) includes a base insulating layer (1), first to third signal lines (3a,3b,3c), a first cover insulating layer (4) and a conductive layer (6). Wide parts (31,32,33) are formed in the first to third signal lines (3a,3b,3c). The first cover insulating layer (4) is provided on the base insulating layer (1) so as to cover the wide parts (31,32,33). The conductive layer (6) is provided on the first cover insulating layer (4) so as to cover a portion above the wide parts (31,32,33).
A capacitive element is formed of the wide part (31,32,33), the cover insulating layer (4) and the conductive layer (6). Generation of high-frequency noise can be prevented.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng ; fre ; ger |
| recordid | cdi_epo_espacenet_EP1951009A1 |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | Printed circuit board |
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