METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH DIFFERENT METALLIC GATES

A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor cap (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) and a second cap (34) is deposited and patter...

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Bibliographische Detailangaben
Hauptverfasser:	LANDER, ROBERT, J., P, VAN DAL, MARK
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor cap (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) and a second cap (34) is deposited and patterned to be present in the second region not the first. A thick selectively etchable layer for example of SIGe is deposited, the gates are patterned in both first and second regions, and the selectively etchable layer is removed. A metal layer is deposited and reacted with the first and second caps to form fully suicided or fully germanided layers.