SCAN ENGINE WITH DUAL CHIP ARCHITECTURE FOR USE IN ELECTRO-OPTICAL READERS

SCAN ENGINE WITH DUAL CHIP ARCHITECTURE FOR USE IN ELECTRO-OPTICAL READERS

A microprocessor and an application specific integrated circuit are embodied as two chips mounted on a printed circuit board which is, in turn, mounted on a scan engine for use in an electro-optical reader. This dual chip architecture is readily configurable and controls reader operation.

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Bibliographische Detailangaben
Hauptverfasser: SACKETT, WILLIAM, GIEBEL, JAMES, SCHNEIDER, GARY, G, DIFAZIO, COSTANZO
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
HANDLING RECORD CARRIERS
PHYSICS
PICTORIAL COMMUNICATION, e.g. TELEVISION
PRESENTATION OF DATA
RECOGNITION OF DATA
RECORD CARRIERS
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Beschreibung
Zusammenfassung:A microprocessor and an application specific integrated circuit are embodied as two chips mounted on a printed circuit board which is, in turn, mounted on a scan engine for use in an electro-optical reader. This dual chip architecture is readily configurable and controls reader operation.