HIGH EFFICIENCY TRAPPING METHOD FOR DEPOSITION PROCESS

The present invention provides a system, apparatus and method for improving the efficiency of a semiconductor processing system, such as a deposition system by decreasing or substantially eliminating the accumulation of by-products in the apparatus components of the semiconductor processing system....

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser:	HOGLE, Richard
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	The present invention provides a system, apparatus and method for improving the efficiency of a semiconductor processing system, such as a deposition system by decreasing or substantially eliminating the accumulation of by-products in the apparatus components of the semiconductor processing system. The present invention further relates to improving the efficiency of a foreline trap associated with a semiconductor processing system, wherein the trap removes substantially all of the by-products from the exhaust gas from the processing chamber. In addition, the present invention provides a system, apparatus and method for efficiently clearing traps of accumulated by-products from exhaust gas of a semiconductor processing system.