SEMICONDUCTOR ARRANGEMENT OF MOSFETS
The arrangement has metal oxide semiconductor field effect transistors (MOSFETs) (Q1-Q6) on a chip that has connections (10, 12, 14) and serving as power and control cells. Source and gate connections of the MOSFETs are connected with each other and contact connections (10, 14), respectively. A drai...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | The arrangement has metal oxide semiconductor field effect transistors (MOSFETs) (Q1-Q6) on a chip that has connections (10, 12, 14) and serving as power and control cells. Source and gate connections of the MOSFETs are connected with each other and contact connections (10, 14), respectively. A drain connection of one power cell contacts the connection (12). Gate and drain connections of one control cell are connected with each other. |
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