Method for programming a memory device suitable to minimize floating gate couplings and memory device

Method for programming a memory device (30) of the type comprising a matrix of memory cells (35) divided in buffers of cells (35) capacitively uncoupled from each other, the method comprising the steps of: - first programming of said cells (35) belonging to a buffer (B); - second programming of said cells (35) belonging to said buffer (B); said step of first programming occurs with a ramp gate voltage having first pitch (p1) and programs said cells of said buffer (B) with higher threshold distribution and said step of second programming occurs with a ramp gate voltage having pitch (p2) lower than the pitch (p1). The invention also relates to a memory device suitable for implementing the method proposed.